1. Field of the Disclosure
The present disclosure is related to devices having memory and more particularly to devices using redundant memory.
2. Description of the Related Art
Data errors can occur at memory systems in response to various types of interference at the memory system causing one or more memory bit cells to spontaneously flip to its opposite state in response to a radiation event. The problem of sporadic data errors can be mitigated by using extra memory bits and memory controllers that exploit these bits. For example, extra bits can be used to record parity information, store redundant information, or to store error correcting code information. Parity bits allow the detection of any odd number of wrong bits, but cannot be used to correct errant data. Redundant memory allows for detection of an error at memory bit cells by detecting a difference their storage state. Redundant memory also allows for correction of data in normal memory designs by storing a single bit of information at three or more memory locations and providing the logic state represented at the majority of memory locations as the corrected data. Error correcting codes can detect and correct sporadic data errors at bit cells using special algorithms that use coefficients to encode information in a block of bits that contains sufficient detail to permit the recovery of a one or more bit errors in a memory region. Unlike parity, which uses a single bit to provide protection to eight bits, ECC uses larger groupings to protect multiple bits. One draw back with the use of ECC is that it generally takes many logic stages to correct data errors, thereby resulting in a relatively long latency. Thus, while the use of error correcting codes and redundant data can be used to correct sporadic data errors, the space and complexity of doing so can be costly. Therefore, an efficient way of correcting errant data would be useful.